void __4_12__Management_Interface() {
    /**
     * @group:       	4.12 Management Interface
     *
     * @description: 	The management interface may be used by an external host processor to read and write the device’s registers. This
     * 					interface has three available modes of operation: SPI, I 2 C or MIIM. The interface mode is selected at the deassertion
     * 					of reset by a strapping option (refer to Section 3.2.1, "Configuration Straps," on page 18 for additional information).
     * 					Of the three interface options, SPI provides the highest performance, while MIIM performance is the lowest. Most impor-
     * 					tantly, MIIM provides access to the PHY control and status registers, but not to any of the switch registers. The vast
     * 					majority of applications therefore can use SPI or I 2C, but not MIIM.
     * 					Register access is also available through the high-performance in-band management interface as described in Section
     * 					4.13, "In-Band Management," on page 65.
     *
     */
}