void __4_1_3_2__10BASE_TE_RECEIVE() {
    /**
     * @group:       	4.1.3.2 10BASE-Te Receive
     *
     * @description: 	On the receive side, input buffers and level detecting squelch circuits are employed. A differential input receiver circuit
     * 					and a phase-locked loop (PLL) perform the decoding function.
     * 					The Manchester-encoded data stream is separated into clock signal and NRZ data. A squelch circuit rejects signals with
     * 					levels less than 400mV or with short pulse widths to prevent noise at the RXP1 or RXM1 input from falsely triggering
     * 					the decoder. When the input exceeds the squelch limit, the PLL locks onto the incoming signal and the device decodes
     * 					a data frame. The receiver clock is maintained active during idle periods in between data reception.
     */
}