void __4_5_2__HIGH_AVAILABILITY_SEAMLESS_REDUNDANCY_HSR() {
    /**
     * @group:       	4.5.2 HIGH AVAILABILITY SEAMLESS REDUNDANCY (HSR)
     *
     * @description:	HSR is a redundancy method that utilizes a ring network topology to achieve seamless failover - i.e. it can withstand a
     * 					single point of failure without any frame loss. It is defined in standard IEC 62439-3 Clause 5, and is referenced by sub-
     * 					station automation standard IEC 61850.
     * 					An HSR ring has no supervisor node, though that doesn't preclude network monitoring. Instead, each frame of ordinary
     * 					network traffic is duplicated, with one frame sent in one direction around the ring, and its duplicate sent in the opposite
     * 					direction. Should a frame traverse the entire ring and return to its source node, it will be dropped. When a unicast des-
     * 					tination node receives a duplicate frame pair, it accepts the first frame and forwards it to its host management port, and
     * 					it drops the second frame. Because the ring is complete, with no blocked ports, and ordinary traffic traverses the ring in
     * 					both directions, it is fully redundant. A single failure therefore does not cause any loss of traffic.
     * 					The KSZ9477S supports HSR implementation with the following hardware assist features:
     * 					• Duplicate frame discard with sequence number tracking
     * 					• Self address filtering
     * 					Any two ports of the KSZ9477S may be used as the ports for participation in the HSR ring. These ports are selected by
     * 					setting two bits, as appropriate, in the HSR Port Map register.
     * 					Self address filtering is used to ensure that frames cannot traverse the ring more than once. When this feature is
     * 					enabled, the source address of all received frames is compared to the node's own MAC address. If there is a match,
     * 					the frame will not be forwarded. Self address filtering can be enabled for all ports by setting bit 6 in the Switch Lookup
     * 					Engine Control 1 Register. Alternatively, it can be enabled on a per-port basis by setting bit 3 in the Port Control 2 Reg-
     * 					ister. The local MAC address is programmed in Global Switch MAC Address registers (Switch MAC Address 0 Register
     * 					through Switch MAC Address 5 Register).
     * 					Duplicate frame discard is implemented in hardware in order to remove the burden of duplicate frames being received
     * 					by the host processor. This feature utilizes a 2-way set-associative on-chip memory with 512 entries for storing and man-
     * 					aging variables relating to received frames. Entries are indexed by a combination of the source and destination
     * 					addresses, as reduced by a hash function. Tracking is performed independently for each of the two ring ports. For each
     * 					received frame, the HSR sequence number is extracted and compared to values in the table. If a matching frame has
     * 					already been received on the other port, the frame is dropped. If not, then standard forwarding rules apply.
     * 					As with the conventional forwarding address table, entries in this table are subject to removal due to aging. This is done
     * 					automatically. Because of the size and structure of the memory, it is possible that it may not be able to accommodate
     * 					all source/destination address combinations at once. In such a case, it is possible that some duplicate frames will not
     * 					always be dropped. The host processor must therefore be able to tolerate a small number of duplicate received frames.
     * 					Duplicate discard is enabled by setting bit 7 in the Global HSR AME Control 0 register (0x0644). Although duplicate
     * 					discard functions automatically once set up and enabled, the table can also be accessed via software, using certain
     * 					indirect registers.
     * 					All frames in an HSR network are generated by the host processor, including the HSR tag and sequence numbers. Tail
     * 					tagging must be utilized for the host processor to indicate the two destination ports for each generated frame. Note that
     * 					the HSR Port Map register does not play a role in determining the transmission ports.
     *
     */
}