void __5_1_1_7__0x0014_0x0017_32_Global_Interrupt_Mask_Register() {
/**
 * @header:     	5.1.1.7 Global Interrupt Mask Register
 * @address:    	0x0014 - 0x0017 | Size: 32 bits
 *
 * @description:	This register enables the interrupts in the Global Interrupt Status Register.
 *
 * @note:
 *
 * +-------+-----------------------------------------------------------------------+------+---------+
 * | Bits  | Description                                                           | Type | Default |
 * +-------+-----------------------------------------------------------------------+------+---------+
 * | 31    | Lookup Engine (LUE) Interrupt Mask                                    | R/W  | 0b      |
 * |       | 0 = Interrupt enabled                                                 |      |         |
 * |       | 1 = Interrupt disabled                                                |      |         |
 * +-------+-----------------------------------------------------------------------+------+---------+
 * | 30    | GPIO Pin Output Trigger and Timestamp Unit Interrupt Mask              | R/W  | 0b      |
 * |       | 0 = Interrupt enabled                                                 |      |         |
 * |       | 1 = Interrupt disabled                                                |      |         |
 * +-------+-----------------------------------------------------------------------+------+---------+
 * | 29:0  | RESERVED                                                              | RO   | -       |
 * +-------+-----------------------------------------------------------------------+------+---------+
 *
 */
}