void __5_1_2_2__0x0103_0x0103_08_Output_Clock_Control_Register() {
/**
 * @header:     	5.1.2.2 Output Clock Control Register
 * @address:    	0x0103 | Size: 8 bits
 *
 * @description:
 *
 * @note:
 *
 * +------+-----------------------------------------------------------------------+------+---------+
 * | Bits | Description                                                           | Type | Default |
 * +------+-----------------------------------------------------------------------+------+---------+
 * | 7    | Recovered Clock Ready (REC_CLK_RDY)                                   | RO   | -       |
 * |      | 0 = The selected recovered clock is not ready                         |      |         |
 * |      | 1 = The selected recovered clock is ready                             |      |         |
 * +------+-----------------------------------------------------------------------+------+---------+
 * | 6:5  | RESERVED                                                              | RO   | 00b     |
 * +------+-----------------------------------------------------------------------+------+---------+
 * | 4:2  | SYNCLKO Source                                                        | R/W  | 000b    |
 * |      | 000 = From crystal / clock input at XI pin                            |      |         |
 * |      | 001 = From port 1 recovered clock                                     |      |         |
 * |      | 010 = From port 2 recovered clock                                     |      |         |
 * |      | 011 = From port 3 recovered clock                                     |      |         |
 * |      | 100 = From port 4 recovered clock                                     |      |         |
 * |      | 101 = From port 5 recovered clock                                     |      |         |
 * |      | 110 – 111 = Reserved                                                  |      |         |
 * +------+-----------------------------------------------------------------------+------+---------+
 * | 1    | SYNCLKO Output Pin Enable                                             | R/W  | 1b      |
 * |      | 0 = Disabled                                                          |      |         |
 * |      | 1 = Enabled                                                           |      |         |
 * +------+-----------------------------------------------------------------------+------+---------+
 * | 0    | SYNCLKO Frequency                                                     | R/W  | 0b      |
 * |      | 0 = 25 MHz                                                            |      |         |
 * |      | 1 = 125 MHz                                                           |      |         |
 * +------+-----------------------------------------------------------------------+------+---------+


 *
 */
}