void __5_1_7_3__0x0610_0x0610_08_Global_DLR_Control_Register() {
/**
 * @header:     	5.1.7.3 Global DLR Control Register
 * @address:    	0x0610 - 0x0610 | Size: 8 bits
 *
 * @description:
 *
 * @note:
 *
 * +-------+------------------------------------------------------------------------------------+--------+------------+
 * | Bits  | Description                                                                        | Type   | Default    |
 * +-------+------------------------------------------------------------------------------------+--------+------------+
 * | 7:4   | RESERVED                                                                           | RO     | 0000b      |
 * +-------+------------------------------------------------------------------------------------+--------+------------+
 * | 3     | Reset Sequence ID (RESET_SEQ_ID)                                                   | R/W    | 0b         |
 * |       | When set, the hardware resets the sequence ID in the beacon frames. As the         |        |            |
 * |       | beacons are sent very quickly and the hardware access is slower, it is advised     |        |            |
 * |       | to only set this bit when the beacon transmit is not enabled.                      |        |            |
 * |       | 0 = Normal                                                                         |        |            |
 * |       | 1 = Reset sequence ID                                                              |        |            |
 * +-------+------------------------------------------------------------------------------------+--------+------------+
 * | 2     | Backup Supervisor Enable (BACKUP_SUPERVISOR_AUTO_ON)                               | R/W    | 0b         |
 * |       | When the Backup Supervisor mode is enabled, the hardware wi                        |        |            |
 * |       | beacons automatically when both beacon timeouts are detected. It is required       |        |            |
 * |       | to disable this bit and enable it again when the Beacon TX Enable bit is set       |        |            |
 * |       | and then turned off.                                                               |        |            |
 * |       | 0 = Stay as a ring node                                                            |        |            |
 * |       | 1 = Enable as an auto backup supervisor                                            |        |            |
 * +-------+------------------------------------------------------------------------------------+--------+------------+
 * | 1     | Beacon TX Enable (BEACON_TX_ENB)                                                   | R/W    | 0b         |
 * |       | Enabling Beacon TX will cause the hardware to send beacons to both ports in        |        |            |
 * |       | the interval specified by the Global DLR Beacon Interval Register.                 |        |            |
 * |       | 0 = Disable beacon packet transmission                                             |        |            |
 * |       | 1 = Enable beacon packet transmission to be, or ask arbitration to be, a           |        |            |
 * |       | supervisor node                                                                    |        |            |
 * +-------+------------------------------------------------------------------------------------+--------+------------+
 * | 0     | Hardware Assist Enable (DLR_ASSIST_ENB)                                            | R/W    | 0b         |
 * |       | Hardware assist is required for running the node as a supervisor.                  |        |            |
 * |       | 0 = No DLR assist                                                                  |        |            |
 * |       | 1 = Hardware assist for DLR enabled                                                |        |            |
 * +-------+------------------------------------------------------------------------------------+--------+------------+
 *
 */
}