void __5_5_1__0x1F0000_16_SGMII_Control_Register() {
/**
 * @header:     	5.5.1 SGMII Control Register
 * @address:    	0x1F0000 | Size: 16 bits
 * @port:
 * @phy_register:
 * @mmd_register:
 * @description:
 *
 * @note:			The correct link speed and duplex should be manually set following completion of SGMII auto-negotiation. The detected
 *					SGMII link speed and duplex are reflected in the SGMII Auto-Negotiation Status Register. This section is not required
 *					for SerDes mode.
 *
 * +-------+------------------------------------------------------------------------------------+-----------+----------------------+
 * | Bits  | Description                                                                        | Type      | Default              |
 * +-------+------------------------------------------------------------------------------------+-----------+----------------------+
 * | 15    | SGMII Soft Reset                                                                   | R/W/SC    | 0b                   |
 * |       | Setting this bit triggers the software reset process in which all digital and      |           |                      |
 * |       | analog portions of the SGMII block are reset. The SGMII registers are reset        |           |                      |
 * |       | to their default values.                                                           |           |                      |
 * +-------+------------------------------------------------------------------------------------+-----------+----------------------+
 * | 14    | SGMII Local Loopback Enable                                                        | R/W       | 0b                   |
 * |       | Data going from the internal switch fabric to the SGMII port is looped back        |           |                      |
 * |       | digitally in the PCS sub-block and returned to the internal switch fabric.         |           |                      |
 * |       | 0 = Normal operation                                                               |           |                      |
 * |       | 1 = SGMII local Loopback mode                                                      |           |                      |
 * +-------+------------------------------------------------------------------------------------+-----------+----------------------+
 * | 13    | Speed Selection (LSB)                                                              | R/W       | 0b                   |
 * |       | This bit, along with bit 6 in this register, indicates the speed.                  |           |                      |
 * |       | [bit 6, bit 13]                                                                    |           |                      |
 * |       | 00 = 10 Mbps                                                                       |           |                      |
 * |       | 01 = 100 Mbps                                                                      |           |                      |
 * |       | 10 = 1000 Mbps                                                                     |           |                      |
 * |       | 11 = RESERVED                                                                      |           |                      |
 * +-------+------------------------------------------------------------------------------------+-----------+----------------------+
 * | 12    | Auto-Negotiation Enable                                                            | R/W       | 1b                   |
 * |       | Applies to the SGMII mode only.                                                    |           |                      |
 * |       | 0 = Disable                                                                        |           |                      |
 * |       | 1 = Enable                                                                         |           |                      |
 * +-------+------------------------------------------------------------------------------------+-----------+----------------------+
 * | 11    | SGMII Power-Down                                                                   | R/W       | 0b                   |
 * |       | The SGMII block has separate power down control from the rest of the chip.         |           |                      |
 * |       | When exiting power-down mode, the correct sequence is to take the main             |           |                      |
 * |       | chip out of power down first before taking the SGMII out of power down.            |           |                      |
 * |       | 0 = Normal operation                                                               |           |                      |
 * |       | 1 = SGMII power-down. Turns off the receiver and transmitter, and switches         |           |                      |
 * |       | off all clocks.                                                                    |           |                      |
 * +-------+------------------------------------------------------------------------------------+-----------+----------------------+
 * | 10    | RESERVED                                                                           | RO        | 0b                   |
 * +-------+------------------------------------------------------------------------------------+-----------+----------------------+
 * | 9     | Restart Auto-Negotiation R/WC 0b                                                   | RO        | -                    |
 * +-------+------------------------------------------------------------------------------------+-----------+----------------------+
 * | 8     | Force Full Duplex                                                                  | R/W       | 1b                   |
 * |       | 0 = Half duplex                                                                    |           |                      |
 * |       | 1 = Full duplex                                                                    |           |                      |
 * +-------+------------------------------------------------------------------------------------+-----------+----------------------+
 * | 7     | RESERVED                                                                           | RO        | 0b                   |
 * +-------+------------------------------------------------------------------------------------+-----------+----------------------+
 * | 6     | Speed Selection (MSB)                                                              | R/W       | 1b                   |
 * |       | Refer to bit 13 for details.                                                       |           |                      |
 * +-------+------------------------------------------------------------------------------------+-----------+----------------------+
 * | 5:0   | RESERVED                                                                           | RO        | 000000b              |
 * +-------+------------------------------------------------------------------------------------+-----------+----------------------+
 *
 */
}