void __5_5__SGMII_Registers_Indirect() {
/**
 * @header:     	5.5 SGMII REGISTERS (INDIRECT)
 * @address:
 * @port:
 * @phy_register:
 * @mmd_register:
 * @description:	This section details the indirectly addressable SGMII registers, which are summarized in Table 5-8, "SGMII Register
 *					Map (Indirect)". The indirect SGMII register address space is 21 bits. Detailed descriptions of the supported SGMII reg-
 *					isters are provided in the following subsections. Refer to Section 5.2.3, "Port N: Port SGMII Control Registers (0xN200
 *					- 0xN2FF)," on page 172 for additional information on accessing the indirect SGMII registers.
 *					The following two standard port registers serve as the portal registers to access the indirect SGMII registers:
 *					• Port SGMII Address Register
 *					• Port SGMII Data Register
 *
 * @note:
 *
 * @table:			TABLE 5-8: SGMII REGISTER MAP (INDIRECT)
 *					+----------+-----------------------------------------------------------+
 *					| Address  | TABLE 5-8: SGMII REGISTER MAP (INDIRECT)                  |
 *					+----------+-----------------------------------------------------------+
 *					| 0x1F0000 | SGMII Control Register                                    |
 *					| 0x1F0001 | SGMII Status Register                                     |
 *					| 0x1F0002 | SGMII PHY ID 1 Register                                   |
 *					| 0x1F0003 | SGMII PHY ID 2 Register                                   |
 *					| 0x1F0004 | SGMII Auto-Negotiation Advertisement Register             |
 *					| 0x1F0005 | SGMII Auto-Negotiation Link Partner Base Ability Register |
 *					| 0x1F0006 | SGMII Auto-Negotiation Expansion Register                 |
 *					| 0x1F8000 | SGMII Digital Control Register                            |
 *					| 0x1F8001 | SGMII Auto-Negotiation Control Register                   |
 *					| 0x1F8002 | SGMII Auto-Negotiation Status Register                    |
 *					+----------+-----------------------------------------------------------+
 *
 */
}